1. Field of the Invention
The present invention relates to a unit pixel of an image sensor, and more particularly, to a unit pixel of an image sensor having a three-dimensional structure, which has a transistor and a photodiode, and a method for manufacturing the same.
2. Description of the Related Art
Referring to Korean Patent No. 10-0782463 entitled “Separation type unit pixel of image sensor having 3 dimensional structure and manufacture method thereof”, in order to increase a fill factor as a ratio between the area occupied by a photodiode and the size of a pixel, a wafer, in which a photodiode is formed, and a wafer, in which other circuit components are formed, are separately manufactured and are bonded to each other by way of conductive pads. As an alignment (arrangement) method for bonding the wafers, infrared (IR) irradiation, etching and laser punching are used.
FIG. 1 is a photograph showing the cross-section of a wafer when a TSV (through-silicon via) process is conducted as a generally-used method for aligning wafers.
In the TSV process, through-silicon vias are defined narrowly and long through silicon in order to electrically connect top and bottom wafers and define upwardly facing electrodes. The through-silicon vias are also used as the origin of coordinates for alignment.
As shown in the drawing, in a semiconductor manufacturing process, design is made such that the through-silicon via has a high aspect ratio, that is, a diameter of 2.5 μm and a height of 55 μm. In the TSV process, etching and filling are difficult to conduct, and uniformity and repeatability during aligning wafers are likely to deteriorate depending upon chips or wafers.
Further, in a super via (contact) method and an infrared irradiation method, which are used in the conventional art as an alignment (arrangement) method for bonding wafers, problems are caused in that processing is involved and the precision of the alignment may be degraded.